The present invention relates generally to semiconductor devices, and more particularly, to a semiconductor device including a finFET and a diode having reduced defects in the depletion area.
Conventional finFET semiconductors devices may include one or more diodes to perform various functions including voltage rectification, circuit protection, voltage biasing and thermal sensing. For example, when using an external thermal diode to measure temperature, the accuracy of the temperature measurement may be affected by the ideality factor which contributes to the sensitivity of the diode.
Referring to FIG. 1A, a cross-sectional view illustrating a conventional semiconductor device 10 in a first orientation is illustrated. The conventional semiconductor device 10 includes a first portion 12 having a fin area 14 and a second portion 16 having a planar area 18. FIG. 1B is a cross-sectional view in a second orientation of the conventional semiconductor device 10 illustrated in FIG. 1A. In this second orientation, a PC gate area 20 is illustrated being formed in the first portion 12 and the planar area 18 is formed on the second portion 16. During fabrication of the conventional semiconductor device 10, the PC gate area 20 may be etched to form a gate 19 that extends across one or more fins 21. However, over-etching can occur, which erodes the planar area 18 (i.e., forms eroded areas 22) as illustrated in FIGS. 2A-2B. If the planar area 18 comprises a diode, for example, the silicon area of the diode may be eroded thereby reducing the ideality factor.